7130LA100JGB 1K X 8 DUAL-PORT SRAM, 100 ns, PQCC52
From Integrated Device Technology
| Status | ACTIVE |
| Access Time-Max (tACC) | 100 ns |
| EU RoHS Compliant | Yes |
| Lead Free | Yes |
| Memory Density | 8192 deg |
| Memory IC Type | DUAL-PORT SRAM |
| Memory Width | 8 |
| Mfr Package Description | 0.750 X 0.750 INCH, 0.170 INCH HEIGHT, GREEN, PLASTIC, LCC-52 |
| Number of Functions | 1 |
| Number of Terminals | 52 |
| Number of Words | 1024 words |
| Number of Words Code | 1K |
| Operating Mode | ASYNCHRONOUS |
| Operating Temperature-Max | 125 Cel |
| Operating Temperature-Min | -55 Cel |
| Organization | 1K X 8 |
| Package Body Material | PLASTIC/EPOXY |
| Package Shape | SQUARE |
| Package Style | CHIP CARRIER |
| Parallel/Serial | PARALLEL |
| Supply Voltage-Max (Vsup) | 5.5 V |
| Supply Voltage-Min (Vsup) | 4.5 V |
| Supply Voltage-Nom (Vsup) | 5 V |
| Surface Mount | Yes |
| Technology | CMOS |
| Temperature Grade | MILITARY |
| Terminal Finish | MATTE TIN |
| Terminal Form | J BEND |
| Terminal Pitch | 1.27 mm |
| Terminal Position | QUAD |
