74F112SCQR F/FAST SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
From Fairchild Semiconductor Corporation
| Status | ACTIVE-UNCONFIRMED |
| Family | F/FAST |
| Logic IC Type | J-K FLIP-FLOP |
| Mfr Package Description | 0.150 INCH, SOIC-16 |
| Number of Bits | 2 |
| Number of Functions | 2 |
| Number of Terminals | 16 |
| Operating Temperature-Max | 70 Cel |
| Operating Temperature-Min | 0.0 Cel |
| Output Polarity | COMPLEMENTARY |
| Package Body Material | PLASTIC/EPOXY |
| Package Shape | RECTANGULAR |
| Package Style | SMALL OUTLINE |
| Propagation Delay (tpd) | 7.5 ns |
| Supply Voltage-Max (Vsup) | 5.25 V |
| Supply Voltage-Min (Vsup) | 4.75 V |
| Supply Voltage-Nom (Vsup) | 5 V |
| Surface Mount | Yes |
| Technology | TTL |
| Temperature Grade | COMMERCIAL |
| Terminal Finish | NOT SPECIFIED |
| Terminal Form | GULL WING |
| Terminal Pitch | 1.27 mm |
| Terminal Position | DUAL |
| Trigger Type | NEGATIVE EDGE |
| fmax-Min | 130 MHz |
