8602501XA SRAM Chip Async Dual 5V 64-bit 16 x 4-bit 30ns 28-Pin CDIP
From e2v Aerospace & Defense
| Access Time | 30 |
| Address Bus | 4(b) |
| Architecture | Not Required |
| Clock Freq | Not Required(MHz) |
| Density | 64(Bit) |
| Mounting | Through Hole |
| Number of I/O Lines | 4 |
| Number of Ports | 2 |
| Number of Words | 16 |
| Operating Supply Voltage (Max) | 5.5(V) |
| Operating Supply Voltage (Min) | 4.5(V) |
| Operating Supply Voltage (Typ) | 5(V) |
| Operating Temp Range | -55C to 125C |
| Operating Temperature Classification | Military |
| Package Type | CDIP |
| Pin Count | 28 |
| Rad Hardened | No |
| Supply Current | 210 |
| Sync/Async | Asynchronous |
| Word Size | 4(b) |
