5962-8687519XA SRAM Chip Async Dual 5V 8K-Bit 1K x 8 35ns 48-Pin SBCDIP
From e2v
| Access Time | 35ns |
| Address Bus | 10 b |
| Architecture | Not Required |
| Clock Freq | Not Required MHz |
| Density | 8192 Bit |
| Mounting | Through Hole |
| Number of Ports | 2 |
| Number of Words | 1K |
| Operating Supply Voltage (Max) | 5.5 V |
| Operating Supply Voltage (Min) | 4.5 V |
| Operating Supply Voltage (Typ) | 5 V |
| Operating Temp Range | -55C to 125C |
| Operating Temperature Classification | Military |
| Package Type | CDIP |
| Pin Count | 48 |
| Rad Hardened | No |
| Supply Current | 180mA |
| Sync/Async | Asynchronous |
| Word Size | 8 b |
