DS1000-125IND Tapped Delay Line
From Dallas Semiconductor
Circuits Per Package | 1 |
Maximum Fan Out | 10 |
Package | DIP |
Pins | 14 |
Technology | CMOS |
Vsup Nom.(V) Supply Voltage | 5.0 |
t(PLH) Maximum (S) | 125n |
t(r) Max. (s) Rise time | 3n |
Circuits Per Package | 1 |
Maximum Fan Out | 10 |
Package | DIP |
Pins | 14 |
Technology | CMOS |
Vsup Nom.(V) Supply Voltage | 5.0 |
t(PLH) Maximum (S) | 125n |
t(r) Max. (s) Rise time | 3n |