CY7C342B15JC CPLD MAX® Family 2.5K Gates 128 Macro Cells 83.3MHz 0.65um (CMOS) Technology 5V 68-Pin PLCC
From CYPRESS SEMICONDUCTOR
| # I/Os (Max) | 52 |
| # Macrocells | 128 |
| Family Name | MAX� |
| Frequency | 100 MHz |
| Frequency (Max) | 100 MHz |
| In System Programmable | No |
| Memory Type | EPROM |
| Mounting | Surface Mount |
| Number of Logic Blocks/Elements | 8 |
| Number of Usable Gates | 2500 |
| Operating Supply Voltage (Max) | 5.25 V |
| Operating Supply Voltage (Min) | 4.75 V |
| Operating Supply Voltage (Typ) | 5 V |
| Operating Temp Range | 0C to 70C |
| Operating Temperature (Max) | 70C |
| Operating Temperature (Min) | 0C |
| Operating Temperature Classification | Commercial |
| Package Type | PLCC |
| Pin Count | 68 |
| Programmable | Yes |
| Propagation Delay Time | 15 ns |
| Rad Hardened | No |
