CY7C341B25JC CPLD MAX® Family 3.75K Gates 192 Macro Cells 50MHz 0.65um (CMOS) Technology 5V 84-Pin PLCC
From CYPRESS SEMICONDUCTOR
| # I/Os (Max) | 64 |
| # Macrocells | 192 |
| Family Name | MAX� |
| Frequency | 62.5 MHz |
| Frequency (Max) | 62.5 MHz |
| In System Programmable | No |
| Memory Type | EPROM |
| Mounting | Surface Mount |
| Number of Logic Blocks/Elements | 12 |
| Number of Usable Gates | 3750 |
| Operating Supply Voltage (Max) | 5.25 V |
| Operating Supply Voltage (Min) | 4.75 V |
| Operating Supply Voltage (Typ) | 5 V |
| Operating Temp Range | 0C to 70C |
| Operating Temperature (Max) | 70C |
| Operating Temperature (Min) | 0C |
| Operating Temperature Classification | Commercial |
| Package Type | PLCC |
| Pin Count | 84 |
| Programmable | Yes |
| Propagation Delay Time | 25 ns |
| Rad Hardened | No |
