Product Datasheet Search Results:

CY7C341B25JC.pdf6 Pages, 85 KB, Original
CY7C341B25JC
Cypress Semiconductor
CPLD MAX® Family 3.75K Gates 192 Macro Cells 50MHz 0.65um (CMOS) Technology 5V 84-Pin PLCC
CY7C341B25JC.pdf6 Pages, 85 KB, Original
CY7C341B25JC
Cypress Semiconductor
CPLD MAX® Family 3.75K Gates 192 Macro Cells 50MHz 0.65um (CMOS) Technology 5V 84-Pin PLCC

Product Details Search Results:

Cypress.com/CY7C341B25JC
{"Number of Logic Blocks\/Elements":"12","Mounting":"Surface Mount","Number of Usable Gates":"3750","Programmable":"Yes","Operating Temperature (Min)":"0C","Operating Temperature (Max)":"70C","Operating Temperature Classification":"Commercial","Package Type":"PLCC","# Macrocells":"192","Operating Supply Voltage (Max)":"5.25 V","Propagation Delay Time":"25 ns","Family Name":"MAX\ufffd","Operating Supply Voltage (Min)":"4.75 V","Frequency (Max)":"62.5 MHz","Operating Temp Range":"0C to 70C","Pin Count":"84","...
1528 Bytes - 17:35:18, 29 September 2024