{"V(OL)Max.(V)Lo Level Out.Volt.":".4","Vsup(+) Nom.(V) Pos.Sup.Volt.":"5","Pins":"176","@Iol (A)":"6m","Logic Level Family":"CMOS and T","Package Body Material":"Ceramic","Gate Capacity":"8000","VIL Max. (TTL) (V)":".8","Package":"PGA","VIH Min. (TTL) (V)":"2","@IOH (test)":"4m","Configurable Logic Blocks":"1232","Military":"N","Number of User I\/Os":"140","V(OH)Min.(V)Hi Level Out.Volt.":"3.7","Technology":"CMOS","Maximum Toggle Rate":"60M"}...

{"Number of Logic Blocks\/Elements":"1232","Mounting":"Through Hole","Number of Usable Gates":"8000","Programmable":"Yes","Logic Cells":"1232","Process Technology":"1.0um (CMOS)","# Registers":"998","Operating Temperature (Max)":"125C","Operating Temperature Classification":"Military","Package Type":"CPGA","Propagation Delay Time":"4.3 ns","Family Name":"ACT\ufffd 2","Operating Supply Voltage (Min)":"4.5 V","Operating Temp Range":"-55C to 125C","Operating Supply Voltage (Max)":"5.5 V","Device System Gates":...